- Good knowledge of digital logic design, IP/SoC architecture and microarchitecture.
- Experience in IP and/or SoC Logic / RTL integration
- Ability to understand and specify micro-architecture
- Familiarity with a range of internal and 3rd-party logic design tools
- Proficiency with RTL coding and checkers (LEC, CDC, DFT)
- Well versed in interface timing budget & clock domain crossing design
- Knowledge of VCS, Co-sim, Conformal LEC is an advantage.
- Analytical ability, problem solving and communication skills
- Strong communication and team-work skills
- Design Engineer