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Job Description

2 - 10 years of experience
Sound knowledge in Micro Architecture design and RTL implementatio
Understanding of ARM SoCs with AXI/AHB buses, peripherals, CPUs and mobile SOCs is desirable
Experience in Synthesis and pre-layout timing analysis
Understanding of DFT flow is desirable
Experiencing using clear case a must
Experienced with VHDL/Verilog/coding and tools like VCS/Verdi/Spyglass/Mentor Zero-in
Proficiency in LEC and formal flows.
Experience in Perl, TCL and shell scripting
Excellent interpersonal & analytical skills with ability to work independently


Designation

  • Design Engineer